Centre d’Élaboration de Matériaux et d’Etudes Structurales (UPR 8011)


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Integrated circuits materials

Staff: Marc Legros

The main application of thin metallic films is the processing of interconnects in microelectronic chips. Aluminum, and Copper nowadays are combined with other materials (insulator, semiconductors) and have to resist stresses generated by thermal gradients or current fluxes. Stress mainly arises from the difference between the coefficient of thermal expansion of metals and insulator or semiconductor. When thermally cycled, the yield stress of the metal is reached first, provoking a permanent deformation of the interconnect. Repeating such plastic deformation can lead to metal failure. In this research area, we study both metallic thin films and interconnects plasticity and the structural evolution in real devices.

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Micrographs of Aluminum grains in a metal layer. The MET image (a) and the image of a cross section obtained by FIB (b) show an homogeneous grains size whom one dimension is equal to the thickness of the layer while the other is of the order of magnitude of the width of the grid.
© CEMES-CNRS

Predictive reliability of mecatronic devices

The reliability of intelligent power devices from Freescale Semiconductor is studied in collaboration with Epsilon Ingenierie and LAAS Laboratory. These devices contain one or several power dies controlled by a control die encapsulated in the same housing. The main goal of the study is to determine the failure mechanisms of the component when it is submitted to electrical current cycles which result in extreme temperature and stress gradients.

Accelerated ageing tests are performed on dedicated test benches at Freescale Semiconductor. The structural analysis before and after test is realized using different experimental methods : scanning acoustic microscopy (reflection and transmission), X rays, Focus Ion Beam and scanning electronic microscopy, transmission electron microscopy.

The results of the previous study (Benjamin Khong thesis 2007) show that the ageing of the component is correlated to the propagation of fatigue cracks in the regions of lower mechanical strength (Predisp project supported by the region Midi Pyrénées). These zones are mainly located at the interfaces of the component: metallization film and welds.

These zones have been reinforced in the new generation of components and potential failures are expected to concern the MOS itself. This new study is being conducted in the frame of Donatien Martineau’s PhD thesis which is financially supported by a CIFRE convention.

 

Collaborations :

Freescale Semiconductor, Université de Leoben( Autriche), SIMAP (Grenoble), Harvard University (USA), TECSEN (Marseille), CEA-LETI (Grenoble), Université de Louvain (Belgique), Johns Hopkins University (USA), LAAS (Toulouse), Max Planck Institut fur Metallforschung (Allemagne)

 

Selected publications

  • B. Khong, M. Legros, Ph. Dupuy, C. Levade, G. Vanderschaeve, Alterations induced in the structure of intelligent power devices by extreme electro-thermal fatigue. Phys.Stat.Sol (a), 204, 2997, 2006
  • B. Khong, M. Legros , P. Tounsi, Ph. Dupuy, X. Chauffleur, C. Levade, G. Vanderschaeve, E. Scheid, Characterization and modelling of ageing failures on Power MOSFET Devices Microelectronics Reliability 47, 1735, 2007
  • B. Khong, M. Legros, Ph. Dupuy, C. Levade, G. Vanderschaeve, On the failure of intelligent power devices induced by extreme electro-thermal fatigue. A microstructural analysis Solid State Phenomena, 131-133, 523, 2008