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Ultra-shallow source/drain junctions :
new materials and processes

The aim of this research activity is to understand and model the physical phenomena occurring during the various process steps required for the fabrication of Ultra-Shallow Junctions for future MOS transistors generations.
While the conventional ‘‘ion implantation + RTA’’ procedure is still used (and being pushed to its limits) for the fabrication of USJs, several new technological solutions are proposed to

fulfil the miniaturisation requirements of the ITRS, including preamorphisation, ultra-fast and ultra-high temperature anneals (Flash anneals or Laser) as well as plasma implantation.
In addition, these processes must be compatible with the introduction of new materials, which are expected to replace silicon to improve the transistors performances, such as silicon on insulator (SOI) and Ge-based materials

Research subjects

Our research activity can be divided in two groups which include:

A) “basic” studies on the formation and evolution of implantation-induced defects and their impact on dopant diffusion and activation.

B) ”applied” studies on the fabrication of ultra-shallow junctions. Here, we apply the concepts developed within the “basic” studies in order to understand the technological problems associated to the various proposed fabrication processes.

A selection of the most relevant results achieved over the last few years includes the following subjects:

Silicon

• New insight in the transformation of {113} defects into Dislocation Loops
• Defects Evolution in silicon after millisecond Flash anneals
• Detailed structure determination of BICs in ion implanted silicon
• Fluorine co-implants for the suppression of dopant deactivation
• USJ fabrication by F+/C+ co-implants and millisecond Flash anneals
• Boron Trapping at EOR Defects in Ultra-Shallow Junctions
• Impact of BICs on Hall scattering factor and on carrier mobility in USJs
• Formation and evolution of BICs in MBE-grown silicon
Related publications

Silicon On Insulator (SOI)

• Defect evolution in silicon on insulator (SOI) structures
• Carrier mobility degradation in ultrathin unstrained and strained SOI films
• The Vacancy Engineering Approach in Silicon and SOI
• Simulation of transient enhanced diffusion in SOI
Related publications

Germanium-based materials

• End Of Range defects in Germanium
• Silicon-germanium interdiffusion from pure germanium deposited layers
• Doping of germanium by phosphorus implantation: Diffusion simulations
Related publications

This work is the result of a long-lasting collaboration between CEMES and LAAS researchers, all based in Toulouse, which has been active since the 1990s.

Most of our recent publications have been supported by the European Projects ATOMICS and PullNANO as well as a research collaboration with STMicroelectronics (“Alliance Nano 2008” and “Nano 2012”).

In addition to our well established collaborations with the main microelectronics research laboratories in France (CEA-LETI, ST-Microelectronics, SOITEC, IEMN-CNRS), these projects allowed us to consolidate our long-lasting European collaborations (University of Surrey, University of Newcastle, Fraunhofer Institute Erlangen, IMEL Athens and Mattson Thermal Products, Dornstadt).