Measuring local charge densities on an active Metal-Oxide-Semiconductor device

Extreme measurements by electron holography on a biased capacitor

September 21, 2022

Everything is considered known about the humble capacitor, especially one made of silicon dioxide on silicon extremely used in semiconductor devices. It is surprising therefore that the electric field within a such capacitor has never been mapped out at the nanoscale. Using operando electron holography, the electric potential across a working MOS nanocapacitor has been measured with unprecedented sensitivity and revealed unexpected charged layers at the interfaces with electrodes.

MOS capacitors are widely used in many advanced devices whose performance is dependent on their miniaturization and operation (field-effect transistor, flash memory, dynamic random-access memory and active regions of image sensors). While new materials for the dielectric are constantly being explored from high-K materials to ferroelectrics and negative capacitance ferroelectric stacks, silicon dioxide is still the most widely used dielectric material and feature prominently in textbooks on semiconductor physics. By applying bias across the two electrodes, charge is stored at the two interfaces. In reality, the physics is rich and complex, ranging from band-bending, depletion regions and inversion layers in the semiconductor substrate to charge trapping in the dielectric oxide and at the interfaces.

Charge trapping changes the capacitance and performance of real devices by modifying the threshold voltage and frequency response and is a major concern for dielectric breakdown. The uncertainty concerning their location arises from the fact that the majority of the characterisation techniques are based on indirect measurements.

CEMES researchers have explored whether electron holography combined with finite element modelling simulations can be used as a new way of studying these systems. They succeeded in mapping the electric field, with nanometre spatial resolution and very high sensitivity, in a nanocapacitor whilst applying bias. Surprisingly, the electric field is not uniform in the dielectric layer: a much higher electric field prevails in a region which extends to over 5 nm close to the electrodes. 

Left: TEM image of the metal (Ti) – oxide (SiO2) – semiconductor (Si) device.
Middle: projected electrical potential at 5V bias measured by electron holography using the I2TEM microscope
Right: phase shift profile for different applied potentials as a function of position

This region corresponds to a zone of uniform space charge, opposite in sign to that on the electrode. Whilst charge trapping is known in silicon dioxide capacitors, it is totally unexpected to find charges over 5 nm from the interface. Furthermore, these experiments show that these dielectric charges are at thermal equilibrium, appearing only when the capacitor is biased. Needless to say, the consequences are important for the capacitance and others electrical features of the device.

These results both demonstrate the extreme sensitivity of the measurement technique (device capacitance of 80 atto-Farad, electrical potential resolved to 9 mV, charge measurements down to 50 elementary charges).

Extended Charge Layers in Metal-Oxide-Semiconductor Nanocapacitors Revealed by Operando Electron Holography
C. Gatel, R. Serra, K. Gruel, A. Masseboeuf, L. Chapuis, R. Cours, L. Zhang, B. Warot-Fonrose, and M. J. Hÿtch
Phys. Rev. Lett. 129, 137701

Christophe Gatel – christophe.gatel[at]
Martin Hÿtch – martin.hytch[at]

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